Let’s assume that the two address lines of the Output device are connected to A0 and A1 of the 6502 address bus. The technical documentation of this (imaginary) device would probably refer to these locations as Registers, numbered 0 to 3. This means 4 distinct locations can referenced within the device. Imagine the Output Device has a 2-bit address bus and an 8-bit data bus. But what does each device “see” when its ENABLE pin goes low? That depends on how many of the other address lines (A0 to A14 inclusive) are connected between the 6502 address bus and the device. So now we know what addresses to read to, and write from, to access one or other of the devices. This is what is meant by the statement “The Output Device is located in the 0x8000 to 0xFFFF memory space” and is known as Memory-mapped IO. This means that all addresses in the range 0x0000 to 0x7FFF will result in the RAM being enabled (since A15 is low for all those addresses in that range) and the Output Device being disabled, and all addresses in the range 0x8000 to 0xFFFF will mean the RAM is disabled, and the Output Device is enabled (since A15 is high, but subsequently inverted before it reaches the Output Device, for all addresses in that range). However - and this is crucial - the signal on A15 travels through an inverter before it reaches the ENABLE pin of the Output device. Address line A15 is then connected to the ENABLE pin of each device. In other words, when the ENABLE pin is connected to ground, the corresponding device is activated. One way the physical version of this system could be wired is as follows: Imagine each device has an active-low ENABLE pin. The 6502 itself has a 16-bit address bus and 8-bit data bus, with the bus lines numbered from A0 to A15, and D0 to D7, respectively. It has some RAM and a character output device. It has an 8-bit general-purpose I/O port which the 6502 does not have, but the instruction set remains the same. I had a Commodore 64 when I was younger so was always particularly interested in the CPU of that machine, which was a MOS Technology 6510. The goal would be to have the emulated 6502 write “Hello, world” to the console of my linux desktop machine. Therefore I decided to write a simple example of a host system for an emulated MOS Technology 6502 microprocessor.
6502 emulator how to#
While emulation source code for various CPU cores is easily available, I wanted to better understand how to interface the emulated CPU with my host machine. CPU emulation, particularly of older processors, is an interesting topic.